In a multiprocessor environment, there are additional problems, namely how to control the additional processors, which may be executing exactly the same instruction at the same cycle. The solution to successfully serializing access to critical structures is solved by using a special instruction prefix, LOCK, which guarantees that all accesses to memory for the following instruction occur as a unit, with no intervening cycles by other processors, DMA devices, or bus masters.
Instructions such as:
Increment(INC), Decrement(DEC), Add(ADD,ADC), Subtract(SUB,SBB),
Logical operations, (AND,OR,XOR,NOT,NEG),
Exchange(XCHG), Exchange&Add(XADD), Compare&Exchange(CMPXCHG)
can be used to claim a resource, add a node to a linked list, and perform other atomic events which normally require serialization, like selecting a ready thread to run.
Note: The 486 and following processors assert the hardware signal 'lock' for XCHG, XADD and CMPXCHG instructions if an operand is in memory, regardless of a prefix.
Each processor will use the appropriate method to attempt its task, and if the condition code does not indicate success, it will simply retry the operation until it does complete. This is called a 'spin loop', and this method of serialization is called a 'spin lock'. It is used when it is expected to be able to access the lock in less time than it will take to save the current context and find another thread to run.
One should not expect to discover the presence of spin locks in a non-multiprocessor environment, because they should always be available, and the spinning should never occur.