All instruction encodings are subsets of the general instruction format
shown in the following figure. Instructions consist of optional instruction
prefixes (in any order), one or two primary opcode bytes, possibly an address
specifier consisting of the ModR/M byte and the SIB (Scale Index Base) byte,
a displacement, if required, and an immediate data field, if required.
Instruction Format
┌─────────────────────────────────────────────────────────────┐ │ ┌──────────────┬─────────────┬────────────┬──────────┐ │ │ │ INSTRUCTION │ ADDRESS- │ OPERAND- │ SEGMENT │ │ │ │ PREFIX │ SIZE PREFIX │SIZE PREFIX │ OVERRIDE │ │ │ ├──────────────┴─────────────┴────────────┴──────────┤ │ │ │ 0 OR 1 0 OR 1 0 OR 1 0 OR 1 │ │ │ │----------------------------------------------------│ │ │ │ │ │ │ │ NUMBER OF BYTES │ │ │ └────────────────────────────────────────────────────┘ │ │ │ │ ┌─────────┬────────┬─────┬──────────────┬────────────┐ │ │ │ OPCODE │ MODR/M │ SIB │ DISPLACEMENT │ IMMEDIATE │ │ │ ├─────────┴────────┴─────┴──────────────┴────────────┤ │ │ │ 1 OR 2 0 OR 1 0 OR 1 0,1,2 OR 4 0,1,2 OR 4│ │ │ │----------------------------------------------------│ │ │ │ NUMBER OF BYTES │ │ │ └────────────────────────────────────────────────────┘ │ └─────────────────────────────────────────────────────────────┘
Smaller encoding fields can be defined within the primary opcode or opcodes. These fields define the direction of the operation, the size of the displacements, the register encoding, or sign extension; encoding fields vary depending on the class of operation.
Most instructions that can refer to an operand in memory have an addressing form byte following the primary opcode byte(s). This byte, called the ModR/M byte, specifies the address form to be used. Certain encodings of the ModR/M byte indicate a second addressing byte, the SIB (Scale Index Base) byte, which follows the ModR/M byte and is required to fully specify the addressing form.
Addressing forms can include a displacement immediately following either the ModR/M or SIB byte. If a displacement is present, it can be 8-, 16- or 32-bits.
If the instruction specifies an immediate operand, the immediate operand always follows any displacement bytes. The immediate operand, if specified, is always the last field of the instruction.
Zero or one bytes are reserved for each group of prefixes. The prefixes are grouped as follows:
For each instruction, one prefix may be used from each group. The effect of redundant prefixes (more than one prefix from a group) is undefined and may vary from processor to processor. The prefixes may come in any order.
The following are the allowable instruction prefix codes: F3H REP prefix
(used only with string instructions)F3H REPE / REPZprefix( usedonlywithstringinstructions
)
F2H REPNE/REPNZ prefix (used only with string instructions)
F0H LOCK prefix
The following are the segment override prefixes: 2EH CS segment override
prefix
36H SS segment override prefix
3EH DS segment override prefix
26H ES segment override prefix
64H FS segment override prefix
65H GS segment override prefix
66H Operand-size override
67H Address-size override