The previous discussion has concentrated on the application's view of memory management. Applications running under OS/2 Version 2.0 need not even be aware of the mechanism through which the 0:32 addressing scheme is implemented; the application only deals with 32-bit addresses, and is not concerned with the way these are mapped to physical addresses in processor storage.
When using the flat memory model, the 80386 processor regards each memory address as a 32-bit address, seen solely as an offset from address 0 into a linear address space. If the 80386 processor is running with paging disabled, this linear address and the physical address in memory are equal. Physical memory is now divided 4KB blocks, which is allocated as required to processes running in the system. There is no direct correlation between the linear address of a page and its address in physical storage. In fact, not all pages in the linear address space will be represented in physical memory. The 80386 processor has a paging subsystem, which handles the conversion of the linear address into a physical address and also detects situations where there is no physical page corresponding to a page in the linear address space.
Paging is usually carried out without any awareness on the part of an application.