The memory model used by OS/2 Version 2.0 is known as a flat memory model. This term refers to the fact that memory is regarded as a single large linear address space of 4GB, using 32 bits for direct memory addressing. This view applies for each and every process in OS/2 Version 2.0. Memory addresses are defined using a 32-bit addressing scheme, which results in a linear address space of 4GB in size.
Like the 80286 processor, the 80386 also supports a segmented memory model, except that in the case of the 80386 the maximum segment size is 4GB. While the 80386 processor does not explicitly provide a facility for disabling the segmented memory model, OS/2 Version 2.0 implements the flat memory model by mapping the 4GB address space as a single code segment and a single data segment, each of which has a base address of zero and a size of 4GB. Only two segment selectors are therefore required in the system; an executable/readable code segment in the CS register, and a read/write data segment in the DS, ES, FS, GS, and SS registers. These selectors are known as aliases, since they all map to the same linear address range. The way, in which the address space is implemented using the Intel 80386 processor, is explained in Intel 80386 Architecture.
The 32-bit addressing scheme used by OS/2 Version 2.0 will hereafter be referred to as 0:32, in order to differentiate it from the 16-bit segmented addressing scheme used by previous versions of OS/2, which will be referred to as 16:16. These terms reflect the fact that the older segmented memory model uses a 16-bit segment selector and a 16-bit offset to refer to a specific memory location, whereas the newer flat memory model has no need of a segment selector, and simply uses a 32-bit offset within the system's linear address space.
The system's global address space is the entire 4GB linear address space. Each process has its own process address space, completely distinct from that of all other processes in the system. All threads within a process share the same process address space. This address space is theoretically also 4GB in size. However, the maximum size for process address spaces is defined at system initialization time and is somewhat less than 4GB, to allow space for memory used by the operating system.
Figure "4GB Global Linear Address Space" shows the mapping of a process address space into the system's global address space. The NN shown in Figure "4GB Global Linear Address Space" represents the maximum defined linear address of the process address space, set at system initialization time. OS/2 Version 2.0 sets this limit to 512MB, reserving the linear address range above this point for operating system use. The space above 512MB is known as the system region.
This limitation on the size of the process address space is used by the operating system to ensure protection of the system region from access by applications. See Memory Protection for further explanation.
Conceptually, the process address space is divided into two different regions, as shown in Figure "4GB Global Linear Address Space". One of these regions may be accessed by both 16:16 and 0:32 applications, and is known as the 16/32-bit region or compatibility region. The other region is accessible by 0:32 applications only, and is known as the 32-bit region.
The 16:16 addressing scheme allows access of up to 512MB per process, since the local descriptor tables used in this model contain up to 8192 entries, each of which can point to a segment of up to 64KB in size. In order to ensure that there is no problem in coexisting 16-bit and 32-bit applications under OS/2 V2.0, the maximum size of the process address space has been set at 512MB. This means that all memory in the process address space can be addressed using either the 16:16 or the 0:32 addressing scheme. This capability is important since it allows applications to be composed of mixed 16-bit and 32-bit code, allows 32-bit applications to make function calls to 16-bit service layers, and permits 16-bit applications written for OS/2 Version 1.x to run unmodified, effectively allowing a "hybrid" memory management environment.
The 32-bit flat memory model greatly simplifies the migration of 32-bit applications to OS/2 Version 2.0 from other operating system platforms, and the migration of OS/2 Version 2.0 applications to other platforms. This is in contrast to the segmented memory model implemented by the 80286 processor. All the features described above arise from the fact that a flat linear memory model is used, taking advantage of the advanced features of the 80386 processor. The paging scheme is more general than the segmentation scheme used by the 80286, and the flat memory model will facilitate any future migration of OS/2 to a hardware platform other than the Intel 80x86 family.